Assembly and test provider STATS ChipPAC is laying the groundwork to expand its presence in the high-end packaging market by building a new research and development facility at its home base here that will concentrate on next-generation packaging.

The R&D center will concentrate on refining STATS's range of integrated passive devices and developing through silicon via, microbump bonding for three dimensional die, and embedded active die solutions. "How devices are stacked and interconnected has a significant impact on the size and performance of the final solution," said STATS ChipPAC CTO Han Byung Joon. "We believe the next important step is to build on our 3D wafer level integration technology."

The new operation includes over 10,000 square feet of cleanroom space with an additional 9,000 feet available to support expansion. The facility will initially be staffed with 40 engineers and a lineup of photolithography, plasma etching, and deep reactive ion etching equipment.

After registering a strong financial performance in 2006 STATS ChipPAC is currently the target of a takeover bid by Singapore Technology Semiconductors, a subsidiary of government investment arm Temasek that already holds a 35 percent stake in the company. Temasek has given shareholders until May 18 to respond to the offer.

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