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International Wafer-Level Packaging Conference Wafer-Level, 3D, Stacked Packaging, and Chip Scale
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wlpc.com
May 28, 2008
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Sponsored jointly by the SMTA and Chip Scale Review magazine, the annual IWLPC explores cutting edge topics in wafer-level packaging and IC/MEMS/MOEMS packaging, including 3D/Stacked/CSP/SiP/SoP and mixed technology packages.

2008 Keynote Speaker Announced

Tom Di Stefano Dr. Thomas H. Di Stefano is an internationally recognized pioneer in the fields of chip-scale and wafer-level packaging. He is a founder of Tessera, San Jose, the inventor of the widely adopted µBGA package and other chip-scale packages. An active inventor, Tom has authored or co-authored more than 200 patents in packaging, semiconductors and storage.

Before founding Tessera, Tom spent 19 years with IBM at the T.J. Watson Research Center in senior research and management posts. He earned a Ph.D. in applied physics from Stanford University, Palo Alto, and a BSEE with highest honors from Lehigh University, Bethlehem, PA.

He is currently president and CEO of Centipede Systems, a multi-division, San Jose-based company that develops and markets high-performance test and burn-in sockets, MEMS test platforms and specialized connectors.

Last Year a Success

2007 IWLPC attendance reached an all-time high! Attendees came from over 15 countries from around the world, including Brazil, Canada, China, France, Germany, Guinea, Hong Kong, India, Israel, Japan, Netherlands, Republic of Korea, Singapore, Taiwan, United Kingdom, and United States. Click here to view last year's program.

This conference is definitely NOT for dummies!

The first 250 registrants for the October conference will receive one of five specially selected “For Dummies” books. Attendees will be able to choose one of the five when they register by mail, fax or online. The selections are, Digital Photography for Dummies, Golf for Dummies, Home Maintenance for Dummies, How to Fix Everything for Dummies and Personal Finance for Dummies.

A special panel is scheduled for 8 a.m. on October 16 titled, “Where in the World?” It will include expert panelists who will detail the risks and rewards of establishing a semiconductor-related business in locations that include China, India, Mexico and Vietnam.

Scheduled speakers are Clements E. (Ed) Pausa, PriceWaterhouseCoopers LLP, China; Gunjan Bagla, India; Ron Jones, Silicon Border, Mexico; and Harry Rozakis, Vietnam. Ron Iscoff, editor of Chip Scale Review, will be moderator.

Want More Info?

- See a complete list of companies represented by participants.

- Check out a photo scrapbook from the 2007 IWLPC.

- Visit the Knowledge Base on smta.org for papers from this and other conferences.

- Go to the Bookstore on smta.org to buy proceedings and other industry publications.

Plans are underway for the 2008 program. Continue to check back here for developing information and contact Melissa Serres Marx or Leslee Johns with any questions in the meantime.

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